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| HAF1004(L), HAF1004(S) Silicon P Channel MOS FET Series Power Switching REJ03G0028-0500Z (Previous ADE-208-629B (Z)) Rev.5.00 2003.04.29 Description This FET has the over temperature shut-down capability sensing to the junction temperature. This FET has the built-in over temperature shut-down circuit in the gate area. And this circuit operation to shut-down the gate voltage in case of high junction temperature like applying over power consumption, over current etc.. Features * * * * Logic level operation to (-4 to -6 V Gate drive) High endurance capability against to the shut-down circuit Built-in the over temperature shut-down circuit Latch type shut down operation (need 0 voltage recovery) Outline D DPAK-2 DPAK-S G Gate resistor Temperature Senching Circuit Latch Circuit Gate Shutdown Circuit 12 S 3 12 3 1. Gate 2. Drain (Flange) 3. Source Rev.5.00, Apr.29.2003, page 1 of 10 HAF1004(L), HAF1004(S) Absolute Maximum Ratings (Ta = 25C) Item Drain to source voltage Gate to source voltage Gate to source voltage Drain current Drain peak current Body-drain diode reverse drain current Cannel dissipation Cannel temperature Storage temperature Notes: 1. PW 0s, duty cycle 1% 2. Value at Ta = 25C Symbol VDSS VGSS VGSS ID ID (pulse) IDR Pch Note2 Tch Tstg Note1 Ratings -60 -16 2.5 -5 -10 -5 20 150 -55 to +150 Unit V V V A A A W C C Typical Operation Characteristics Item Input voltage Input current (Gate non shut down) Symbol VIH VIL IIH1 IIH2 IIL Input current (Gate shut down) Shut down temperature Gate operation voltage IIH(sd)1 IIH(sd)2 Tsd Vop Min -3.5 -- -- -- -- -- -- -- -3.5 Typ -- -- -- -- -- -0.8 -0.35 175 -- Max -- -1.2 -100 -50 -1 -- -- -- -12 Unit V V A A A mA mA C V Vi = -8 V, VDS = 0 Vi = -3.5 V, VDS = 0 Vi = -1.2 V, VDS = 0 Vi = -8 V, VDS = 0 Vi = -3.5 V, VDS = 0 Cannel temperature Test Conditions Rev.5.00, Apr.29.2003, page 2 of 10 HAF1004(L), HAF1004(S) Electrical Characteristics (Ta = 25C) Item Drain current Drain current Symbol Min ID1 ID2 4 -- -60 -16 2.5 -- -- -- -- -- -- -- -1.1 2 -- -- -- -- -- -- -- -- -- -- -- Typ -- -- -- -- -- -- -- -- -- -0.8 -- -- 4 140 200 326 2 7.6 3.2 3.2 -0.9 77 8.4 2.4 Max -- -10 -- -- -- -50 -1 100 -- -10 -- 200 340 -- -- -- -- -- -- Unit A mA V V V A A A mA mA A S m m pF s s s s V ns ms ms IF = -5A, VGS = 0 IF = -5 A, VGS = 0 diF/dt = 50 A/s VGS = -5 V, VDD = -16 V VGS = -5 V, VDD = -24 V Test Conditions VGS = -3.5 V, VDS = -2 V VGS = -1.2 V, VDS = -2 V ID = -10 mA, VGS =0 IG = -800 A, VDS =0 IG = 100 A, VDS =0 VGS = -8 V, VDS =0 VGS = -3.5 V, VDS =0 VGS = -1.2 V, VDS =0 VGS = 2.4 V, VDS =0 VGS = -8 V, VDS =0 VGS = -3.5 V, VDS =0 VDS = -60 V, VGS = 0 VDS = -10 V, ID = -1 mA ID =-2.5 A, VDS =-10 V Note3 ID = -2.5 A, VGS = -10 V Note3 ID = -2.5 A, VGS = -4 V Note3 VDS = -10 V, VGS =0, f = 1 MHz VGS = -5 V, ID= -2.5 A, RL = 12 Drain to source breakdown voltage V(BR)DSS Gate to source breakdown voltage V(BR)GSS Gate to source breakdown voltage V(BR)GSS Gate to source leak current IGSS1 IGSS2 IGSS3 IGSS4 Input current (shut down) Zero gate voltage drain current Gate to source cut off voltage Forward transfer admittance Static drain to source on state resistance Static drain to source on state resistance Output capacitance Turn-on delay time Rise time Turn off delay time Fall time Body-drain diode forward voltage IGS(OP)1 IGS(OP)2 IDSS VGS(off) |yfs| RDS(on) RDS(on) Coss td(on) tr td(off) tf VDF -100 A -0.35 -- -2.25 V Body-drain diode reverse recovery trr time Over lord shut down note4 operation time tos1 tos2 Notes: 3. Pulse test 4. Including the junction temperature rise of the lorded condition Rev.5.00, Apr.29.2003, page 3 of 10 HAF1004(L), HAF1004(S) Main Characteristics Power vs. Temperature Derating 40 Channel Dissipation Pch (W) Maximum Safe Operation Area -100 -50 Thermal shut down Operation area 30 (A) -20 -10 -5 -2 is limited by RDS(on) -0.5 -1 -2 DC 10 0 20 Drain Current ID s 1 s m PW pe O = ra 10 m 10 tio -1 Operation in this area -0.5 Ta = 25C -0.3 n s c = 25 C ) (T 0 50 100 150 200 -5 -10 -20 -50 -100 Case Temperature Tc (C) Drain Source Voltage VDS (V) -10 Typical Output Characteristics -10 V -8 V -6 V -5 Typical Transfer Characteristics V DS = -10 V -25C Pulse Test 25C Tc = 75C Drain Current ID (A) -4 V -6 VGS = -3.5 V -4 Drain Current ID (A) -8 -4 -3 -2 Tc = 75C -1 25C -25C 0 -1 -2 -3 -4 -5 Gate to Source Voltage VGS (V) -2 Pulse Test 0 -2 -4 -6 -8 -10 Drain to Source Voltage VDS (V) Rev.5.00, Apr.29.2003, page 4 of 10 HAF1004(L), HAF1004(S) Drain to Saturation Voltage vs. Gate to Source Voltage -2.0 -1.6 Pulse Test Static Drain to Source State Resistance vs. Drain Current 1000 Pulse Test 500 V GS = -4 V 200 100 50 20 10 -0.1 -0.2 -0.5 -1 -2 -5 -10 Drain to Source Saturation Voltage VDS(on) (V) -1.2 I D = -5 A -2.5 A -1 A 0 -2 -4 -6 -8 -10 Gate to Source Voltage VGS (V) Drain Source On Sate Resistance RDS(on) (m) -10 V -0.8 -0.4 Drain Current ID (A) Forward Transfer Admittance |yfs| (S) Drain to Source On State Resistance vs. Temperature RDS(on) (m) 500 Pulse Test 400 300 V GS = -4 V 200 -5 A -2.5 A 100 0 -25 -1 A V GS = -10 V 0 25 50 75 100 125 I D = -5 A -2.5 A -1 A 10 Forward Transfer Admittance vs. Drain Current Tc = -25C Drain Source On State Resistance V DS = -10 V 5 Pulse Test 2 1 25C 75C 0.5 0.2 0.1 0.05 0.02 0.01 -0.01 -0.1 -1 -10 Case Temperature Tc (C) Drain Current ID (A) Rev.5.00, Apr.29.2003, page 5 of 10 HAF1004(L), HAF1004(S) Body to Drain Diode Reverse Recovery Time 1000 100 50 Switching Characteristics Reverse Recovery Time trr (ns) 500 Switching Time t (s) 20 10 5 2 1 0.5 0.2 0.1 VGS = -10 V, VDD = -30 V PW = 300 s, duty < 1 % -0.5 -1 -2 -5 -10 200 100 50 di / dt = 50 A / s V GS = 0, Ta = 25C -0.5 -1 -2 -5 -10 t d(off) tf tr t d(on) 20 10 -0.1 -0.2 -0.1 -0.2 Reverse Drain Current IDR (A) Drain Current ID (A) Reverse Drain Current vs. Source to Drain Voltage -5 10000 Pulse Test -4 -10 V Typical capacitance vs. Drain to Source Voltage VGS = 0 f = 1 MHz Reverse Drain Current I DR (A) -3 Capacitance C (pF) 1000 -2 -5 V VGS = 0 V -1 Coss 100 -0.4 -0.8 -1.2 -1.6 -2.0 0 Source to Drain Voltage VSD (V) -10 -20 -30 -40 -50 Drain to Source VDS (V) -60 0 Rev.5.00, Apr.29.2003, page 6 of 10 HAF1004(L), HAF1004(S) Gate to Source Voltage vs. Shutdown Time of Load-Short Test Shutdown Case Temperature Tc (C) Shutdown Case Temperature vs. Gate to Source Voltage 200 -20 (V) Gate to Source Voltage VGS -16 180 -12 V DD= -16 V -8 -24V -4 0 0.0001 160 140 120 100 0 I D = -0.5 A 0.001 0.01 0.1 -2 -4 -6 -8 -10 Shutdown Time of Lord-Short Test Pw (S) Gate to Source Voltage VGS (V) Normalized Transient Thermal Impedance vs. Pulse Width 3 Normalized Transient Thermal Impedance s (t) Tc = 25C 1 D=1 0.5 0.3 0.2 0.1 0.1 0.05 0.02 e 1 uls 0.0 tp ho 1s ch - c(t) = s (t) * ch - c ch - c = 6.25C/W, Tc = 25C PDM PW T D= 0.03 PW T 0.01 10 m 100 m 1m 10 m Pulse Width PW (S) 100 m 1 10 Rev.5.00, Apr.29.2003, page 7 of 10 HAF1004(L), HAF1004(S) Package Dimensions As of January, 2003 6.5 0.5 5.4 0.5 1.7 0.5 Unit: mm 2.3 0.2 0.55 0.1 4.7 0.5 16.2 0.5 3.1 0.5 1.15 0.1 0.8 0.1 (0.7) 5.5 0.5 1.2 0.3 0.55 0.1 2.29 0.5 2.29 0.5 0.55 0.1 Package Code JEDEC JEITA Mass (reference value) DPAK (L)-(2) -- -- 0.42 g Rev.5.00, Apr.29.2003, page 8 of 10 HAF1004(L), HAF1004(S) As of January, 2003 1.5 0.5 Unit: mm 6.5 0.5 5.4 0.5 (0.1) (0.1) 2.3 0.2 0.55 0.1 (5.1) 5.5 0.5 1.2 Max 0 - 0.25 (1.2) 2.5 0.5 1.0 Max. 2.29 0.5 0.8 0.1 2.29 0.5 0.55 0.1 Package Code JEDEC JEITA Mass (reference value) (5.1) DPAK (S) -- Conforms 0.28 g Rev.5.00, Apr.29.2003, page 9 of 10 HAF1004(L), HAF1004(S) Sales Strategic Planning Div. Keep safety first in your circuit designs! Nippon Bldg., 2-6-2, Ohte-machi, Chiyoda-ku, Tokyo 100-0004, Japan 1. Renesas Technology Corporation puts the maximum effort into making semiconductor products better and more reliable, but there is always the possibility that trouble may occur with them. Trouble with semiconductors may lead to personal injury, fire or property damage. Remember to give due consideration to safety when making your circuit designs, with appropriate measures such as (i) placement of substitutive, auxiliary circuits, (ii) use of nonflammable material or (iii) prevention against any malfunction or mishap. Notes regarding these materials 1. These materials are intended as a reference to assist our customers in the selection of the Renesas Technology Corporation product best suited to the customer's application; they do not convey any license under any intellectual property rights, or any other rights, belonging to Renesas Technology Corporation or a third party. 2. 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Renesas Technology Corporation assumes no responsibility for any damage, liability, or other loss rising from these inaccuracies or errors. Please also pay attention to information published by Renesas Technology Corporation by various means, including the Renesas Technology Corporation Semiconductor home page (http://www.renesas.com). 4. When using any or all of the information contained in these materials, including product data, diagrams, charts, programs, and algorithms, please be sure to evaluate all information as a total system before making a final decision on the applicability of the information and products. Renesas Technology Corporation assumes no responsibility for any damage, liability or other loss resulting from the information contained herein. 5. Renesas Technology Corporation semiconductors are not designed or manufactured for use in a device or system that is used under circumstances in which human life is potentially at stake. Please contact Renesas Technology Corporation or an authorized Renesas Technology Corporation product distributor when considering the use of a product contained herein for any specific purposes, such as apparatus or systems for transportation, vehicular, medical, aerospace, nuclear, or undersea repeater use. 6. The prior written approval of Renesas Technology Corporation is necessary to reprint or reproduce in whole or in part these materials. 7. If these products or technologies are subject to the Japanese export control restrictions, they must be exported under a license from the Japanese government and cannot be imported into a country other than the approved destination. Any diversion or reexport contrary to the export control laws and regulations of Japan and/or the country of destination is prohibited. 8. Please contact Renesas Technology Corporation for further details on these materials or the products contained therein. http://www.renesas.com Copyright (c) 2003. Renesas Technology Corporation, All rights reserved. Printed in Japan. Colophon 0.0 Rev.5.00, Apr.29.2003, page 10 of 10 |
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